The Evolution of Microprocessor Packaging

Microprocessor packaging is undergoing major changes driven by technical, business, and economic factors. From the traditional role of a protective mechanical enclosure, the modern microprocessor package has been transformed into a sophisticated thermal and electrical management platform. Furthermore, microprocessor architecture and design techniques can have significant impact on the complexity and cost of packaging. The need to optimize the total solution (chip, package, board, and assembly) has never been more important to maximize microprocessor performance and minimize cost. It is important to point out that the package represents a way of connecting the microprocessor to the motherboard. In this capacity, it enables the fine feature, silicon-level interconnects to be connected to the motherboard, i.e., the package assists in a space transformation in a controlled and economically viable manner. The key to packaging is to ensure that it enables and optimizes microprocessor performance. In its early evolution, the influence of the package on microprocessor performance was limited; however, as the microprocessor evolves to provide increasing performance, the package must evolve to keep up, and packaging design must ensure that it optimally enables the microprocessor. Package performance, in this context, implies a clear understanding and optimization of the package’s electrical, thermal, and mechanical characteristics to enable overall electrical performance and power dissipation and to ensure mechanical robustness. Recent advances in microprocessor packaging indicate a migration from wirebond (where the chip or die is interconnected to the package only on the periphery of the die) to flip-chip (where the die is interconnected to the package using the entire die area); and from ceramic to organic packages, with cartridge and multichip technologies emerging as key form-factors. With the emergence of the segmented market (mobile, desktop, server and associated sub-segments), we see a significant proliferation of packaging types tailoring functionality and costs to the different markets. To address this proliferation, Intel focuses on packaging building blocks that can be configured for different applications. This paper traces the evolution of Intel’s microprocessor packaging technologies, delineates the technical and business drivers, and highlights emerging trends. It then highlights the technical challenges faced by packaging developers now and in the future, and in a broad sense, it ties them into the challenges highlighted in the semiconductor industry technology roadmaps. Finally, it provides an introduction to the other papers in this issue of the Intel Technology Journal, which deal in greater detail with some of the technical challenges discussed in this paper.